AVR8CS (Control System) mini Operating System kernel
AVR8CS is a mini Operating System kernel for AVR8 based embedded devices.
ACR8CS Capable to run multiple sub-routines for Atmels AVR8 MCU. The default minimal firmware setup requires around ~2.1kB of Flash and ~0.2kB of SRAM.
Currently following functionality is supported:
- Create process and allocate stack size (the stack is allocated in heap region)
- Heap managment
- Simple pre-emptive sheduler
- Switch process to run in co-operative mode (manual control release)
- Process states: sleep, wait
- Process sleep: process will get control back as soon as the sleeping period ends
- Process wait for msg resolution: process will get control back as soon as the message will be resolved by other process
- Process mutex: the system has mutex implementation, the process waiting for the mutex will set to wait state.
- Process semaphore (sem): the system has semaphore implementation, the process wating for the semaphore will be sent to wait state.
- FIFO buffer: First-In-First-Out buffer
- Process sub-routine boundaries control (if the process accedentally returns from its subprogram)
- Process "condition_wait": an addon which sets process to WAIT state untill some condition will not be satisfyed.
- ISR delayed processing: each ISR vector has predefined handler declared in kernel. The ISR can be set as delayed. The delayed ISR will not immediately execute interrupt handler. The handler will be executed later in the same time and priority with other processes.
- Performance monitor: can be allowed or removed during compilation by modifying pre-processor variables.
- 16MHz quarts (possible more or less, but the code was not tested on other frequencies)
- At least 2kB of RAM. (1kB possibly will be enough to run 2 processes as 1024 - 200 - 150 = 674 bytes of effective SRAM where 550 can be allocated for heap)
- At least 6kB of Flash memory.
- No EEPROM required
- Timer0 (8-bit) with OCRA and OCRB. This timer is occupied for sheduler.
- Watchdog (optional)
- At the moment the firmware was executed successfully only on ATMega2560 16MHz
The watchdog will be triggered on 2 seconds timeout. Watchdog is reseted when the context is switched. If process runs in cooperative mode, the context switch will be avoided, and watchdog will continue counting. If process does not release control in 2 seconds, the watchdog will generate interrupt and force process to release control by setting flag - "ready to release", so on the next timer tick, the context will be switched.
The default OCR0A interrupts is set to 1kHz - is the default "tick" frequency. So, for each process gets 1kHz in a loop.
The CPU time allocation is considered arbitrary equal, however, for the CPU time allocation the responsibility is placed on programmer.
The user code located in subroutines (processes) can block interrupts using CRITICAL_SECTION() macro, which is the same as ATOMIC_BLOCK(ATOMIC_RESTORESTATE).
- Sometimes, under unknown circumstances, the mutex is not properly locked which leads to out of sync condition when both processes stack on attempt to lock mutex, or mutex left forever locked. Possibly it was fixed.
- Heap integrity is not checked.
- (?)Move event generator from TIMER0 to TIMER1(16-bit) as it has 3 channels which makes possible to use OCR1C to measure time spent in CRITICAL_SECTION or ISR.
- Sorry, but you can not use stdlib's malloc, calloc, realloc and free. It is not compatiable with kernel_malloc kernel_realloc kernel_free as both are working in the same address
- customise AVR-LIBC and compile against the kernel - [PLANNED]
- Add queues dispatcher - [NOT NEEDED]
- Basic input/output (bio) - [USE EXTERNAL LIBS]
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